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TSB41LV06APZP

商品名称： TSB41LV06APZP

规格型号： TSB41LV06APZP

库       存： 2920

交       期： 1-2周

商品单价： ￥98.254388[含税] 行情波动大，购买前请与客服确认

  • 起订量

    商品单价[含税]

  • 1

    ￥98.254388

  • 100

    ￥85.827442

  • 250

    ￥66.171951

  • 1000

    ￥59.189483

  • 商品分类：   其他接口
  • 封　　装：HTQFP (PZP)
  • 品　　牌：
  • 批　　号：两年内
  • 所在区域：大陆
好评率:100 %| 商品评分:100|
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  • Fully Supports Provisions of IEEE 1394-1995 Standard for High Performance Serial Bus and the P1394a Supplement
  • Fully Interoperable With FireWireTM and i.LINKTM Implementation of IEEE Std 1394
  • Fully Compliant With OpenHCI Requirements
  • Provides Six P1394a Fully Compliant Cable Ports at 100/200/400 Megabits per Second (Mbits/s)
  • Full P1394a Support Includes: Connection Debounce, Arbitrated Short Reset, Multispeed Concatenation, Arbitration Acceleration, Fly-By Concatenation, Port Disable/Suspend/Resume
  • Extended Resume Signaling for Compatibility With Legacy DV Devices
  • Power-Down Features to Conserve Energy in Battery Powered Applications Include: Automatic Device Power-Down During Suspend, Device Power-Down Terminal, Link Interface Disable via LPS, and Inactive Ports Powered-Down
  • Ultralow-Power Sleep Mode
  • Node Power Class Information Signaling for System Power Management
  • Cable Power Presence Monitoring
  • Cable Ports Monitor Line Conditions for Active Connection to Remote Node
  • Register Bits Give Software Control of Contender Bit, Power Class bits, Link Active Control Bit and P1394a Features
  • Data Interface to Link-Layer Controller Through 2/4/8 Parallel Lines at 49.152 MHz
  • Interface to Link Layer Controller Supports Low Cost TI Bus-Holder Isolation and Optional Annex J Electrical Isolation
  • Interoperable With Link-Layer Controllers Using 3.3 V and 5 V Supplies
  • Interoperable With Other Physical Layers (PHYs) Using 3.3 V and 5 V Supplies
  • Low Cost 24.576-MHz Crystal Provides Transmit, Receive Data at 100/200/400 Mbits/s, and Link-Layer Controller Clock at 49.152 MHz
  • Incoming Data Resynchronized to Local Clock
  • Logic Performs System Initialization and Arbitration Functions
  • Encode and Decode Functions Included for Data-Strobe Bit Level Encoding
  • Separate Cable Bias (TPBIAS) for Each Port
  • Single 3.3-V Supply Operation
  • Low Cost High Performance 100-Pin TQFP (PZP) Thermally Enhanced Package
  • Direct Drop-In Upgrade for TSB41LV06PZP

    Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thompson, Limited.
    i.LINK is a trademark of Sony Corporation
    FireWire is a trademark of Apple Computer, Incorporated.

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  • 商品分类

      其他接口

  • 商品名称

    TSB41LV06APZP

  • 规格型号

    TSB41LV06APZP

  • 封　　装

    TSB41LV06APZP

  • 品　　牌

  • 批　　号

    两年内

  • 交　　期

    1-2周

  • 所在区域

    大陆

    • 店铺其他商品

    More>